module my_flow_led (
    input sys_clk,				//系统时钟
	input rst,					//复位信号
	input [3:0] key,             //按键输入
	output reg [3:0]  led	    // 4个LED灯
);
	


 reg [31:0] counter ;
reg [1:0] led_mode;

always @(posedge sys_clk or negedge rst) begin
    if (!rst)
        counter <= 32'b0;
    else if (counter <= 32'd50000000)
        counter <= counter + 1'b1;
    else
        counter <= 0;
end
always @(posedge sys_clk or negedge rst) begin

	if (!rst)
        led_mode <= 2'b00;
    else if (counter == 32'd50000000)
        led_mode <= led_mode + 1'b1;
    else
        led_mode <= led_mode;

end

//通过移位寄存器控制IO口的高低电平，从而改变LED的显示状态
always @ (posedge sys_clk or negedge rst) begin
    
    if (!rst) begin
        led <= 4'b0000;
    end
    else if (key[0] == 0)
        case (led_mode)                     //led从左向右的流水等效果
            2'b00: led <= 4'b0001;
            2'b01: led <= 4'b0010;
            2'b10: led <= 4'b0100;
            2'b11: led <= 4'b1000;
            default: led <= 4'b0000;
        endcase
    else if (key[1] == 0)                   //led 从右向左的流水邓效果
        case (led_mode)
            2'b00: led <= 4'b1000;
            2'b01: led <= 4'b0100;
            2'b10: led <= 4'b0010;
            2'b11: led <= 4'b0001;
            default: led <= 4'b0000;
        endcase
    else if (key[2] == 0)
        case (led_mode)
            2'b00: led <= 4'b1111;
            2'b01: led <= 4'b0000;
            2'b10: led <= 4'b1111;
            2'b11: led <= 4'b0000;
            default : led <= 4'b0000;
        endcase
    else if (key[3] == 0)
        led <= 4'b1111;
    else
        led <= 4'b0000;

end

endmodule